This section has been updated for EPITA-2018 on 2015-10-28.
At the end of this stage, the compiler produces ARM code (possibly with infinite registers). Basically, this stage is TC-7 with the ARM assembly language instead of MIPS.
The ARM architecture is a family of RISC instruction set architectures for computer processors.
Relevant lecture notes include instr-selection.pdf.
|• TC-Y Goals:||What this stage teaches|
|• TC-Y Samples:||See TC-Y work|
|• TC-Y Given Code:||Explanation on the provided code|
|• TC-Y Code to Write:||Explanation on what you have to write|
|• TC-Y FAQ:||Questions not to ask|
|• TC-Y Improvements:||Other Designs|