target::arm, delivered for TC-7. Code
generation for ARM. This is not part of the student project,
but it is left to satisfy their curiosity. In addition its presence is
a sane invitation to respect the constraints of a multi-back-end
Description of the ARMV7 CPU.
The ARM assembly language (syntax, opcodes and layout); it
abstracts the generation of ARM instructions.
target::arm::ArmAssembly derives from
How ARM fragments are to be displayed. In other words, that’s where the (global) syntax of the target assembly file is selected.
A translator from LIR to ASSEM using the ARM
instruction set defined by
target::arm::ArmAssembly. It is
implemented as a dynamic programming algorithm generated by MonoBURG
from a set of brg files.
The ARM back-end, based on an ARM CPU and an ARM code generator.
The Tiger runtime in ARM assembly language: