Nolimips 0.9a

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Nolimips

This manual is for Nolimips (version 0.9a, 19 March 2012), the tiny MIPS simulator.

Copyright © 2003 Benoit Perrot.

Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.1 or any later version published by the Free Software Foundation; with no Invariant Sections, with the Front-Cover texts being “A GNU Manual,” and with the Back-Cover Texts as in (a) below. A copy of the license is included in the section entitled “GNU Free Documentation License.”

(a) The FSF's Back-Cover Text is: “You have freedom to copy and modify this GNU Manual, like GNU software. Copies published by the Free Software Foundation raise funds for GNU development.”

NOLIMIPS is a basic MIPS architecture simulator. It consists of an assembler which reads MIPS assembly code, and of a virtual machine which executes the instructions processed by the assembler. For the moment NOLIMIPS does not produce nor execute binary code, but ELF writer and loader are planned.

The main purpose of NOLIMIPS is to help students of compilers courses to evaluate the output from their "high-level language into MIPS assembler code" compilers, before and after register allocation.

Its features are:

It was written by Benoit Perrot as an LRDE member, so that EPITA students could exercise their compiler projects after the instruction selection but before the register allocation. It is implemented in C++ and Python. Be aware that NOLIMIPS does not need a Python interpreter to run, it is only required to maintain NOLIMIPS.

Information about NOLIMIPS can be found on NOLIMIPS Home Page, and feedback can be sent to lrde's Projects Address. LRDE stands for Laboratoire de Recherche et Dévelopment de l'EPITA, i.e., the Research and Development Lab of EPITA, the Ecole Pour l'Informatique et les Techniques Avancées.

Andrew Appel's home page includes links to material related to compilers theory, and some information about the Modern Compiler Implementation book series.

More information on Python can be found on Python Home Page.

--- The Detailed Node Listing ---

Invoking Nolimips

Internal of Nolimips

The Nolimips Language

Copying This Manual


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1 Invoking Nolimips

To invoke nolimips run:

     nolimips options file

where file.s is a simple text file, and options is any combination of the following options:

-h
--help
Display a help message and exit successfully.
-V
--version
Display the version number and exit successfully.
--usage
Give a short usage message
--tasks-selection
Each task of NOLIMIPS (parsing, execution, etc.) comes with a set of prerequisites: for example the pretty printing of an input program implies the parsing of its source file. This option asks NOLIMIPS to display the tasks that must be run before to run the ones explicitly specified on command line.
--parse
Parse a file.
--trace-scan
Trace the scanning.
--trace-parse
Trace the parse.
-N
--nop-after-branch
To avoid a bubble in their pipeline, MIPS processors execute the instruction immediately following a branch; this instruction is said to be in the delay slot (FIXME: see further). This option fills the delay slot of branch instructions with a NOP, disabling the delay slot, simplifying the task of assembly programmers how do not care about writing optimized code.
-u
--unlimited-regs
During last stages of a compiler, the intermediate representation of a source file (which mainly consists in a generic, architecture independent assembly code) is progressively translated into an architecture dependent assembly code. Low level (but still intermediate) representations are designed to be as near as possible of target assembly code, but generaly consider an extended target machine with an unlimited amount of registers. This option gives NOLIMIPS the ability to handle an arbitrary number of registers, allowing compiler developpers to test their low level output before implementing register allocation. These new registers may be used as any other MIPS registers through the symbols $x0, $x1, and so on. They have a general purpose and are not considered as caller save nor callee save registers.
--prg-display
Display the read program.
--prg-solve
Resolve jump offsets and check bounds of immediates.
--check-callee-save
Warn if a callee save register is not preserved across a call.
-e
--execute
Execute the program on virtual machine.
-E
--trace-exec
Trace the execution.
-i
--shell
Launch interactive shell.


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2 Internal of Nolimips


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2.1 Steps of Nolimips

NOLIMIPS works in three steps:


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3 The Nolimips Language

NOLIMIPS supports a minimal MIPS instruction set and unlimited registers.


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3.1 The Nolimips supported instruction set


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3.1.1 Arithmetic instructions

3.1.1.1 ADD

Add src1 and src2 and store the result in dest (32-bit integers). If an overflow occurs, then trap.

3.1.1.2 ADDU

Add src1 and src2 and store the result in dest (32-bit integers).

3.1.1.3 ADDI

Add a constant imm and src and store the result in dest (32-bit integers). If overflow occurs, then trap.

3.1.1.4 ADDIU

Add a constant imm and src and store the result in dest (32-bit integer).

3.1.1.5 SUB

Subtract src2 from src1 and store the result in dest (32-bit integers). If an overflow occurs (FIXME), then trap.

3.1.1.6 SUBU

Subtract src2 from src1 and store the result in dest (32-bit integers).

3.1.1.7 NEG

Negate (logical 2-complement) src and store the result in dest. If an overflow occurs (FIXME), then trap.

3.1.1.8 NEGU

Negate src (logical 2-complement) and store the result in dest.

3.1.1.9 ABS

Compute the absolute value of src (32-bit integer) and write it to dest.

3.1.1.10 MUL

Multiply two words src1 and src2 and write the result to dest.

3.1.1.11 DIV

Divide src1 by src2 (32-bit signed integers), write the quotient in LO and the remainder in HI (32-bit integer).

3.1.1.12 DIVU

Divide src1 by src2 (32-bit unsigned integers), write the quotient in LO and the remainder in HI (32-bit integer).

3.1.1.13 REM

Compute the remainder from dividing src1 by src2 (32-bit signed integers) and write it to dest.

3.1.1.14 REMU

Compute the remainder from dividing src1 by src2 (32-bit unsigned integers) and write it to dest.


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3.1.2 Bitwise instructions

3.1.2.1 SLL

Left-shift (logical) the word src by the fixed number imm of bits and store the result in dest.

3.1.2.2 SLLV

Left-shift (logical) the word src1 by the variable number src2 of bits and store the result in dest.

3.1.2.3 SRA

Right-shift (arithmetic) the word src by the fixed number imm of bits and store the result in dest.

3.1.2.4 SRAV

Right-shift (arithmetic) the word src1 by the variable number src2 of bits and store the result in dest.

3.1.2.5 SRL

Right-shift (logical) the word src1 by the variable number src2 of bits and store the result in dest.

3.1.2.6 SRLV

Right-shift (logical) the word src1 by the variable number src2 of bits and store the result in dest.

3.1.2.7 ROL

Left-rotate the word src by a number of bits (imm or src2) and store the result in dest.

3.1.2.8 ROR

Right-rotate the word src by a number (imm or src2) of bits and store the result in dest.

3.1.2.9 AND

Compute the bitwise logical AND between src1 and src2 and store the result to dest.

3.1.2.10 ANDI

Compute the bitwise logical AND between src and a constant imm and store the result to dest.

3.1.2.11 OR

Compute the bitwise logical OR between src1 and src2 and store the result to dest.

3.1.2.12 ORI

Compute the bitwise logical OR between src and a constant imm and store the result to dest.

3.1.2.13 XOR

Compute the bitwise logical XOR between src1 and src2 and store the result to dest.

3.1.2.14 XORI

Compute the bitwise logical XOR between src and a constant imm and store the result to dest.

3.1.2.15 NOR

Compute the bitwise logical NOR between src1 and src2 and store the result to dest.

3.1.2.16 NOT

Negate (logical 1-complement) src and store the result in dest.


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3.1.3 Comparison instructions

3.1.3.1 SEQ

Set dest to 1 if src1 equals src2, else clear it.

3.1.3.2 SNE

Set dest to 1 if src1 does not equal src2, else clear it.

3.1.3.3 SGE

Set dest to 1 if src1 is greater or equal to src2 (signed comparison), else clear it.

3.1.3.4 SGEU

Set dest to 1 if src1 is greater or equal to src2 (unsigned comparison), else clear it.

3.1.3.5 SGT

Set dest to 1 if src1 is greater than src2 (signed comparison), else clear it.

3.1.3.6 SGTU

Set dest to 1 if src1 is greater than src2 (unsigned comparison), else clear it.

3.1.3.7 SLE

Set dest to 1 if src1 is lower or equal to src2 (signed comparison), else clear it.

3.1.3.8 SLEU

Set dest to 1 if src1 is lower or equal to src2 (unsigned comparison), else clear it.

3.1.3.9 SLT

Set dest to 1 if src1 is lower than src2 (signed comparison), else clear it.

3.1.3.10 SLTU

Set dest to 1 if src1 is lower than src2 (unsigned comparison), else clear it.

3.1.3.11 SLTI

Set dest to 1 if src1 is lower than a constant imm (signed comparison), else clear it.

3.1.3.12 SLTIU

Set dest to 1 if src1 is lower than a constant imm (unsigned comparison), else clear it.


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3.1.4 Branch instructions

3.1.4.1 BEQ

Branch to label if src1 equals src2.

3.1.4.2 BEQZ

Branch to label if src equals zero.

3.1.4.3 BNE

Branch to label if src1 does not equal src2.

3.1.4.4 BNEZ

Branch to label if src does not equal zero.

3.1.4.5 BGE

Branch to label if src1 is greater or equal to src2 (signed comparison).

3.1.4.6 BGEU

Branch to label if src1 is greater or equal to src2 (unsigned comparison).

3.1.4.7 BGEZ

Branch to label if src is greater or equal to zero (signed comparison).

3.1.4.8 BGEZAL

Call label if src is greater or equal to zero (signed comparison)

3.1.4.9 BGT

Branch to label if src1 is greater than src2 (signed comparison).

3.1.4.10 BGTU

Branch to label if src1 is greater than src2 (unsigned comparison).

3.1.4.11 BGTZ

Branch to label if src is greater than zero (signed comparison).

3.1.4.12 BLE

Branch to label if src1 is lower or equal to src2 (signed comparison).

3.1.4.13 BLEU

Branch to label if src1 is lower or equal to src2 (unsigned comparison).

3.1.4.14 BLEZ

Branch to label if src is lower or equal to zero (signed comparison).

3.1.4.15 BLT

Branch to label if src1 is lower than src2 (signed comparison).

3.1.4.16 BLTU

Branch to label if src1 is lower than src2 (unsigned comparison).

3.1.4.17 BLTZ

Branch to label if src1 is lower than zero (signed comparison).

3.1.4.18 BLTZAL

Call label if src1 is lower than zero (signed comparison).

3.1.4.19 J

Jump to label unconditionaly.

3.1.4.20 JAL

Call label unconditionaly.

3.1.4.21 JR

Jump to address contained in dest unconditionaly.

3.1.4.22 JALR

Call address contained in dest unconditionaly.


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3.1.5 Load instructions

3.1.5.1 LB

Load the 8-bit quantity at address (offset + base) into dest as a signed value.

3.1.5.2 LBU

Load the 8-bit quantity at address (offset + base) into dest as an unsigned value.

3.1.5.3 LW

Load the 32-bit quantity at address (offset + base) into dest as a signed value.

3.1.5.4 LUI

Move the constant imm into the upper half word of dest.

3.1.5.5 LI

Move the constant imm into dest.

3.1.5.6 LA

Move the computed address into dest.


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3.1.6 Store instructions

3.1.6.1 SB

Store the low byte from src at address (offset + base).

3.1.6.2 SW

Store the low word from src at address (offset + base).


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3.1.7 Movement instructions

3.1.7.1 MOVE

Move the contents of src to dest.

3.1.7.2 MFHI

Move the contents of HI to dest.

3.1.7.3 MFLO

Move the contents of LO to dest.

3.1.7.4 MTHI

Move the contents of dest to HI.

3.1.7.5 MTLO

Move the contents of dest to LO.

3.1.7.6 MFC0

Move the contents of control coprocessor src register to CPU dest register.

3.1.7.7 MTC0

Move the contents of CPU src register to control coprocessor dest register.


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3.1.8 Syscall instructions

3.1.8.1 SYSCALL

Raise a system call exception.


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3.1.9 Nop instructions

3.1.9.1 NOP

To do nothing.


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3.2 Nolimips features


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Annexe A Copying This Manual


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To use this License in a document you have written, include a copy of the License in the document and put the following copyright and license notices just after the title page:

       Copyright (C)  year  your name.
       Permission is granted to copy, distribute and/or modify this document
       under the terms of the GNU Free Documentation License, Version 1.2
       or any later version published by the Free Software Foundation;
       with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts.
       A copy of the license is included in the section entitled ``GNU
       Free Documentation License''.

If you have Invariant Sections, Front-Cover Texts and Back-Cover Texts, replace the “with...Texts.” line with this:

         with the Invariant Sections being list their titles, with
         the Front-Cover Texts being list, and with the Back-Cover Texts
         being list.

If you have Invariant Sections without Cover Texts, or some other combination of the three, merge those two alternatives to suit the situation.

If your document contains nontrivial examples of program code, we recommend releasing these examples in parallel under your choice of free software license, such as the GNU General Public License, to permit their use in free software.


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