This manual is for Nolimips (version 0.9a, 19 March 2012), the tiny MIPS simulator.
Copyright © 2003 Benoit Perrot.
Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.1 or any later version published by the Free Software Foundation; with no Invariant Sections, with the Front-Cover texts being “A GNU Manual,” and with the Back-Cover Texts as in (a) below. A copy of the license is included in the section entitled “GNU Free Documentation License.”
(a) The FSF's Back-Cover Text is: “You have freedom to copy and modify this GNU Manual, like GNU software. Copies published by the Free Software Foundation raise funds for GNU development.”
NOLIMIPS is a basic MIPS architecture simulator. It consists of an assembler which reads MIPS assembly code, and of a virtual machine which executes the instructions processed by the assembler. For the moment NOLIMIPS does not produce nor execute binary code, but ELF writer and loader are planned.
The main purpose of NOLIMIPS is to help students of compilers courses to evaluate the output from their "high-level language into MIPS assembler code" compilers, before and after register allocation.
Its features are:
It was written by Benoit Perrot as an LRDE member, so that EPITA students could exercise their compiler projects after the instruction selection but before the register allocation. It is implemented in C++ and Python. Be aware that NOLIMIPS does not need a Python interpreter to run, it is only required to maintain NOLIMIPS.
Information about NOLIMIPS can be found on NOLIMIPS Home Page, and feedback can be sent to lrde's Projects Address. LRDE stands for Laboratoire de Recherche et Dévelopment de l'EPITA, i.e., the Research and Development Lab of EPITA, the Ecole Pour l'Informatique et les Techniques Avancées.
Andrew Appel's home page includes links to material related to compilers theory, and some information about the Modern Compiler Implementation book series.
More information on Python can be found on Python Home Page.
--- The Detailed Node Listing ---
Internal of Nolimips
The Nolimips Language
Copying This Manual
To invoke nolimips run:
nolimips options file
where file.s is a simple text file, and options is any combination of the following options:
$x1, and so on. They have a general purpose and are not considered as caller save nor callee save registers.
NOLIMIPS works in three steps:
mainand start execution (execution).
NOLIMIPS supports a minimal MIPS instruction set and unlimited registers.
Add src1 and src2 and store the result in dest (32-bit integers). If an overflow occurs, then trap.
Add src1 and src2 and store the result in dest (32-bit integers).
Add a constant imm and src and store the result in dest (32-bit integers). If overflow occurs, then trap.
Add a constant imm and src and store the result in dest (32-bit integer).
Subtract src2 from src1 and store the result in dest (32-bit integers). If an overflow occurs (FIXME), then trap.
Subtract src2 from src1 and store the result in dest (32-bit integers).
Negate (logical 2-complement) src and store the result in dest. If an overflow occurs (FIXME), then trap.
Negate src (logical 2-complement) and store the result in dest.
Compute the absolute value of src (32-bit integer) and write it to dest.
Multiply two words src1 and src2 and write the result to dest.
Divide src1 by src2 (32-bit signed integers), write the quotient in LO and the remainder in HI (32-bit integer).
Divide src1 by src2 (32-bit unsigned integers), write the quotient in LO and the remainder in HI (32-bit integer).
Compute the remainder from dividing src1 by src2 (32-bit signed integers) and write it to dest.
Compute the remainder from dividing src1 by src2 (32-bit unsigned integers) and write it to dest.
Left-shift (logical) the word src by the fixed number imm of bits and store the result in dest.
Left-shift (logical) the word src1 by the variable number src2 of bits and store the result in dest.
Right-shift (arithmetic) the word src by the fixed number imm of bits and store the result in dest.
Right-shift (arithmetic) the word src1 by the variable number src2 of bits and store the result in dest.
Right-shift (logical) the word src1 by the variable number src2 of bits and store the result in dest.
Right-shift (logical) the word src1 by the variable number src2 of bits and store the result in dest.
Left-rotate the word src by a number of bits (imm or src2) and store the result in dest.
Right-rotate the word src by a number (imm or src2) of bits and store the result in dest.
Compute the bitwise logical AND between src1 and src2 and store the result to dest.
Compute the bitwise logical AND between src and a constant imm and store the result to dest.
Compute the bitwise logical OR between src1 and src2 and store the result to dest.
Compute the bitwise logical OR between src and a constant imm and store the result to dest.
Compute the bitwise logical XOR between src1 and src2 and store the result to dest.
Compute the bitwise logical XOR between src and a constant imm and store the result to dest.
Compute the bitwise logical NOR between src1 and src2 and store the result to dest.
Negate (logical 1-complement) src and store the result in dest.
Set dest to 1 if src1 equals src2, else clear it.
Set dest to 1 if src1 does not equal src2, else clear it.
Set dest to 1 if src1 is greater or equal to src2 (signed comparison), else clear it.
Set dest to 1 if src1 is greater or equal to src2 (unsigned comparison), else clear it.
Set dest to 1 if src1 is greater than src2 (signed comparison), else clear it.
Set dest to 1 if src1 is greater than src2 (unsigned comparison), else clear it.
Set dest to 1 if src1 is lower or equal to src2 (signed comparison), else clear it.
Set dest to 1 if src1 is lower or equal to src2 (unsigned comparison), else clear it.
Set dest to 1 if src1 is lower than src2 (signed comparison), else clear it.
Set dest to 1 if src1 is lower than src2 (unsigned comparison), else clear it.
Set dest to 1 if src1 is lower than a constant imm (signed comparison), else clear it.
Set dest to 1 if src1 is lower than a constant imm (unsigned comparison), else clear it.
Branch to label if src1 equals src2.
Branch to label if src equals zero.
Branch to label if src1 does not equal src2.
Branch to label if src does not equal zero.
Branch to label if src1 is greater or equal to src2 (signed comparison).
Branch to label if src1 is greater or equal to src2 (unsigned comparison).
Branch to label if src is greater or equal to zero (signed comparison).
Call label if src is greater or equal to zero (signed comparison)
Branch to label if src1 is greater than src2 (signed comparison).
Branch to label if src1 is greater than src2 (unsigned comparison).
Branch to label if src is greater than zero (signed comparison).
Branch to label if src1 is lower or equal to src2 (signed comparison).
Branch to label if src1 is lower or equal to src2 (unsigned comparison).
Branch to label if src is lower or equal to zero (signed comparison).
Branch to label if src1 is lower than src2 (signed comparison).
Branch to label if src1 is lower than src2 (unsigned comparison).
Branch to label if src1 is lower than zero (signed comparison).
Call label if src1 is lower than zero (signed comparison).
Jump to label unconditionaly.
Call label unconditionaly.
Jump to address contained in dest unconditionaly.
Call address contained in dest unconditionaly.
Load the 8-bit quantity at address (offset + base) into dest as a signed value.
Load the 8-bit quantity at address (offset + base) into dest as an unsigned value.
Load the 32-bit quantity at address (offset + base) into dest as a signed value.
Move the constant imm into the upper half word of dest.
Move the constant imm into dest.
Move the computed address into dest.
Store the low byte from src at address (offset + base).
Store the low word from src at address (offset + base).
Move the contents of src to dest.
Move the contents of HI to dest.
Move the contents of LO to dest.
Move the contents of dest to HI.
Move the contents of dest to LO.
Move the contents of control coprocessor src register to CPU dest register.
Move the contents of CPU src register to control coprocessor dest register.
Raise a system call exception.
To do nothing.
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ABS: Arithmetic instructions
ADD: Arithmetic instructions
ADDI: Arithmetic instructions
ADDIU: Arithmetic instructions
ADDU: Arithmetic instructions
AND: Bitwise instructions
ANDI: Bitwise instructions
BEQ: Branch instructions
BEQZ: Branch instructions
BGE: Branch instructions
BGEU: Branch instructions
BGEZ: Branch instructions
BGEZAL: Branch instructions
BGT: Branch instructions
BGTU: Branch instructions
BGTZ: Branch instructions
BLE: Branch instructions
BLEU: Branch instructions
BLEZ: Branch instructions
BLT: Branch instructions
BLTU: Branch instructions
BLTZ: Branch instructions
BLTZAL: Branch instructions
BNE: Branch instructions
BNEZ: Branch instructions
DIV: Arithmetic instructions
DIVU: Arithmetic instructions
J: Branch instructions
JAL: Branch instructions
JALR: Branch instructions
JR: Branch instructions
LA: Load instructions
LB: Load instructions
LBU: Load instructions
LI: Load instructions
LUI: Load instructions
LW: Load instructions
MFC0: Movement instructions
MFHI: Movement instructions
MFLO: Movement instructions
MOVE: Movement instructions
MTC0: Movement instructions
MTHI: Movement instructions
MTLO: Movement instructions
MUL: Arithmetic instructions
NEG: Arithmetic instructions
NEGU: Arithmetic instructions
NOP: Nop instructions
NOR: Bitwise instructions
NOT: Bitwise instructions
OR: Bitwise instructions
ORI: Bitwise instructions
REM: Arithmetic instructions
REMU: Arithmetic instructions
ROL: Bitwise instructions
ROR: Bitwise instructions
SB: Store instructions
SEQ: Comparison instructions
SGE: Comparison instructions
SGEU: Comparison instructions
SGT: Comparison instructions
SGTU: Comparison instructions
SLE: Comparison instructions
SLEU: Comparison instructions
SLL: Bitwise instructions
SLLV: Bitwise instructions
SLT: Comparison instructions
SLTI: Comparison instructions
SLTIU: Comparison instructions
SLTU: Comparison instructions
SNE: Comparison instructions
SRA: Bitwise instructions
SRAV: Bitwise instructions
SRL: Bitwise instructions
SRLV: Bitwise instructions
SUB: Arithmetic instructions
SUBU: Arithmetic instructions
SW: Store instructions
SYSCALL: Syscall instructions
XOR: Bitwise instructions
XORI: Bitwise instructions