The Makefile

If you imagine applying what we have shown you of Make so far to a real project, some limitations will quickly come to light, not least of which is that your program is almost certainly not compiled from a single similarly named source. The behaviours we have demonstrated so far are merely the last line defaults. In practice, the build process is codified in a Makefile. In this Makefile, you list the relationships between the sources of your project along with some transformation rules to specialise Make's default database to meet the project's build requirements.

Here, example 5.2 shows a small Makefile for building the program m4 using three object files, main.o, freeze.o and stackovf.o, and a library from another directory. The libm4.a library declared in m4_LDADD is built from its own source code by another Makefile in the library's own build directory.

     m4_OBJECTS = main.o freeze.o stackovf.o
     m4_LDADD   = ../m4/libm4.a
     
     m4: $(m4_OBJECTS)
             $(CC) -o $ $(m4_OBJECTS) $(m4_LDADD)
     
     clean:
             rm -f $(m4_OBJECTS)
     
     # Object compilation rules follow
     main.o: main.c
             $(CC) -c main.c
     
     freeze.o: freeze.c
             $(CC) -c freeze.c
     
     stackovf.o: stackovf.c
             $(CC) -c stackovf.c
     

     Example 5.2: A simplistic Makefile
     

This file is actually longer than it needs to be, since some of the text included here explicitly (for the purpose of illustration) is supplied from Make's own default internal rules. Although the file might seem somewhat indigestable at first, in broad terms a Makefile can contain only three different structures: Rules, variables and comments. We will describe each in turn over the following subsections, and then move on to some specialisations of the basic Makefile building blocks for the rest of the chapter.

• Make Rules:
• Make Variables:
• Make Comments: