Optimizations in the Tiger Compiler



The Tiger Compiler is an educative project playing a central role in EPITA's third year curriculum. This project is the opportunity to teach students software engineering practices such as design patterns, testing, documentationetc. As the age of serial computing is overparallel-computing technology that was once relegated to universities and research labs is now a core requirement in any computer science curriculum and thus we would like to introduce parallelization in the project. In this report we investigate the possibilities of parallelism in the Tiger Compiler using the Intel Threading Building Blocks (TBB) library. We also diagnosed and corrected several performance problems in the register allocation algorithm.